Adisyn Takes Graphene From the Lab Bench to a Full-Sized Wafer

Adisyn has cleared an important technical hurdle in its effort to develop graphene materials for next-generation semiconductors, successfully depositing graphene across a 200mm copper wafer at temperatures below 300 degrees Celsius.

The achievement matters because semiconductor technologies are ultimately judged not by what they can do on a thumbnail-sized laboratory sample, but by whether they can be scaled to the wafer formats used by industry.

Adisyn’s previous result involved a 1cm² coupon. The latest wafer has a surface area of about 314cm², representing roughly 300 times the area coated in the earlier process run. Management says the result arrived several months ahead of its internal expectations.

That is genuine technical progress. It does not yet amount to a commercially qualified manufacturing process, but it moves the program beyond the small-sample stage where many promising materials technologies spend their days gathering dust and academic citations.

Independent testing provides an early validation point

Following deposition, 12 locations were selected across the wafer’s four quadrants and at different distances from the centre. Each location was measured five times using Raman spectroscopy, while samples from all 12 locations were also examined using transmission electron microscopy at the Hebrew University of Jerusalem.

Graphene was identified at every sampled location. The distribution of the test points is important because it suggests the material was not confined to one favourable section of the wafer.

Managing director Arye Kohavi described the result as a “huge step forward”, adding that identifying graphene at all 12 independently tested locations provided validation of the company’s technology and development approach.

Investors should nevertheless keep the distinction between sampled coverage and fully characterised manufacturing uniformity firmly in mind. Twelve successful locations provide encouraging evidence across the wafer, but semiconductor production requires detailed control over thickness, defects, repeatability and performance from run to run. Adisyn has identified those areas as priorities for the next phase of work.

Why low-temperature graphene is the prize

Adisyn is developing a low-temperature atomic layer deposition process intended to grow graphene directly on semiconductor wafers.

The temperature component is critical. Semiconductor devices contain multiple materials and delicate structures that can be damaged or altered by excessive heat during later manufacturing stages. A process operating below 300 degrees Celsius may therefore be more compatible with existing semiconductor fabrication flows than conventional high-temperature graphene growth methods.

The broader commercial target is the performance of interconnects, the tiny conductive pathways carrying electrical signals within chips. As device features become smaller, traditional copper interconnects face increasing resistance, heat and reliability constraints.

Graphene is being studied internationally because of its electrical and thermal properties, including its potential use in hybrid graphene-metal structures. The applications highlighted by Adisyn include artificial intelligence processors, high-performance computing and memory devices, all markets where heat management and data movement are increasingly becoming limiting factors.

The next hurdle is 300mm

A 200mm wafer is a recognised industrial format and remains widely used across semiconductor manufacturing. However, the most advanced processors and memory products are predominantly manufactured on 300mm wafers.

Adisyn sees the 200mm result as a pathfinder towards that larger format. Scaling from 200mm to 300mm is not simply a matter of buying a bigger dinner plate. The surface area increases materially, placing greater demands on gas flow, temperature consistency, deposition uniformity and defect control.

Before that leap becomes commercially meaningful, the company intends to repeat and refine the 200mm process, assess uniformity and defectivity, collect initial reliability data and begin device-integration work.

Commercial potential remains prospective

The result gives Adisyn a stronger technical basis for approaching semiconductor manufacturers and pursuing joint-development programs. Potential business models could include licensing, process partnerships, materials supply or collaborative development.

None of those pathways has yet translated into forecast revenue or earnings. Customer qualification in the semiconductor industry can be painstakingly slow, while new materials must prove they can deliver repeatable performance without disrupting established production economics.

For investors, the significance is therefore best viewed as risk reduction rather than commercial validation. Adisyn has demonstrated a substantial increase in scale and obtained independent evidence of graphene at geographically dispersed locations across an industry-standard wafer.

The next value-creating milestones will be repeatability, quantified uniformity, device performance, customer engagement and progress towards 300mm wafers. The science has moved forward impressively. The business case now needs to catch up.